1. Field
The present invention relates to a flat panel display device and a source driver circuit for the flat panel display device, and more particularly, to a flat panel display device (FPD) having a digital-to-analog converter (DAC) using separately provided R, G, and B group gradation voltages, and a source driver circuit for the flat panel display device.
2. Description of the Related Art
Recently, various flat panel display devices having a smaller weight and volume than a cathode ray tube (CRT) are being developed. Examples of flat panel display devices include liquid crystal display devices, field emission display devices, plasma display devices, light emitting diodes (LEDs) and organic light emitting diodes (OLEDs).
In general, a flat panel display device includes a display panel, a gate driver circuit and a source driver circuit. The gate driver circuit generates sequentially activated gate signals to sequentially select gate lines of the display panel. The source driver circuit provides source voltages to data lines of the display panel. In this case, the source voltages provided to the data lines have voltage levels corresponding to digital data. Three source voltages generally constitute one set and are provided as R, G, and B image signals to the data lines. In other words, three data lines constitute one set and are driven by the source voltages as R, G, and B image signals.
Meanwhile, the source driver circuit employs digital-to-analog converters (DACs) to generate the source voltages ultimately serving as the R, G, and B image signals, in which group gradation voltages are applied to the DACs. In a specific flat panel display device, the DAC requires separately provided R, G, and B group gradation voltages.
FIG. 1 is a block diagram of a source driver circuit in a conventional flat panel display device using separately provided R, G, and B-group gradation voltages.
A display panel generally includes a number of data lines, such as 512 data lines or 1024 data lines. For convenience of illustration, only six data lines DL1 to DL6 are shown in FIG. 1. For clarity of the illustration, only a data supply unit 10, a digital-to-analog conversion unit 20 and a driving unit 30 among components of the source driver circuit are shown in FIG. 1 and other components and control signals are omitted.
Referring to FIG. 1, respective registers 11 to 16 in the data supply unit 10 provide digital data DGT1 to DGT6 of corresponding data lines DL1 to DL6 to corresponding DACs 21 to 26 of the digital-to-analog conversion unit 20. The DACs 21 to 26 convert the digital data DGT1 to DGT6 to analog data ALT1 to ALT6, respectively. In this case, R, G, and B-group gradation voltages R-VSCL, G-VSCL, and B-VSCL are applied to every three of the DACs 21 to 26 in the digital-to-analog conversion unit 20. In FIG. 1, the R-group gradation voltages R-VSCL are applied to the first and fourth DACs 21 and 24, the G-group gradation voltages G-VSCL are applied to the second and fifth DACs 22 and 25, and the B-group gradation voltages B-VSCL are applied to the third and sixth DACs 23 and 26. In the driving unit 30, amplifiers 31 to 36 amplify and output the analog data ALT1 to ALT6. Outputs of the amplifiers 31 to 36 are provided as the source voltages VSC1 to VSC6 to the corresponding data lines DL1 to DL6 at substantially the same timing, as shown in FIG. 2. In FIG. 2, a unit sourcing period refers to a timing period in which source voltages are provided once to all the data lines of the display panel.
However, in the source driver circuit of the conventional flat panel display device as shown in FIG. 1, a DAC is disposed on each data line. That is, one DAC is disposed on one data line. Here, when a bit number of the digital data is 8, a greater number of transistors are required to embody one DAC. Accordingly, a conventional source driver circuit and a flat panel display device employing the source driver circuit require a very large layout area for DACs.
Thus, there is a need for a flat panel display device requiring a small layout area due to a small number of DACs disposed on each data line, and a source driver circuit for the flat panel display device.